1. Field of the Invention
The present invention relates to a display device active matrix element used for driving a display element such as an element using electroluminescence (EL) or electrochromism (EC) in a matrix display device, and a method of manufacturing the same.
2. Description of the Prior Art
In a conventional matrix display device constituted by display elements such as liquid crystal, EL, or EC elements, a high-density matrix is required to obtain a precise image having a high resolution. In recent years, so-called active matrix display has received a great deal of attention as a technique for causing switching elements to directly drive display elements so as to satisfy the above needs.
A 3-terminal element such as a thin-film transistor or a 2-terminal element such as a thin-film diode, a varistor, and an MIM (a metal-insulator-metal multilayer) is proposed to be used as the above switching element.
Since an element such as a varistor and an MIM has a high threshold voltage (i.e., a voltage generated upon an abrupt increase in current), a high drive voltage is required. When such an element is used as a switching element for active matrix display, power consumption is undesirably increased. A thin-film transistor cannot be easily manufactured as compared with a thin-film diode.
The thin-film diode has advantages in that (1) the element structure is simple and a display device having a sophisticated matrix structure can be manufactured at a high yield, and (2) image quality is high. Therefore, it is suitable to use the thin-film diode as a switching element for active matrix display.
An example of the thin-film diode as a switching element for active matrix display is described in "Japan Display '83", N. Szydlo, et al., Proc. IDRC., PP. 416-418, 1983, in which Schottky diodes are connected in series with each other and are reverse-biased (i.e., back-to-back diode circuit). Another example is described in Japan Unexamined Patent Publication No. 59-57273, in which PIN or Schottky diodes are connected in parallel with each other and are reverse-biased (i.e., a ring diode circuit).
A conventional liquid crystal cell using such a back-to-back diode circuit is shown in FIG. 1. Referring to FIG. 1, reference numeral 20 denotes an upper substrate; 21, a lower substrate; 22, a counter electrode layer; 23, a pixel electrode layer; 24 and 25, alignment layers; 26, a liquid crystal layer; 27, a passivation layer; and 29, an active matrix element of a back-to-back diode circuit. In the active matrix element 29, reference numeral 30 denotes a conductive layer of an n.sup.+ -type semiconductor; 31, a semiconductor layer; 32 and 33, metal layers for forming a Schottky barrier; 34, a scanning electrode layer; and 35, a pixel electrode lead layer integrally formed with the pixel electrode layer.
A conventional back-to-back diode circuit described in Japan Unexamined Patent Application No. 61-116880 is shown in FIG. 2. Referring to FIG. 2, reference numeral 40 denotes a glass substrate; 41, a metal film; 42 and 43, Schottky electrodes; 44, an amorphous silicon film; 45, an n.sup.+ -type amorphous silicon film; and 46, an ohmic contact. Reference symbols T1 and T2 denote terminals.
In the active matrix element 29 having the above structure, a large number of masks are required during the fabrication. In addition, the passivation layer 27 must be undesirably formed, and contact holes must be formed in the passivation layer 27 to form the scanning electrode layer 34 and the pixel electrode lead layer 35. Thus, a larger number of fabrication steps are required to decrease the product yield. Furthermore, the three-dimensional bulky pattern on the surface of the active matrix element is typical, and therefore the layers constituting the element tend to peel and are subjected to damage such as electrical disconnections. From these points of view, the product yield is further decreased. It is also difficult to form uniform alignment layer having equal pretilt angles and/or alignment directions when liquid crystal cells are formed, thus causing alignment errors.
In the conventional active matrix element described in Japan Unexamined Patent Application No. 61-116880, the element surface is flat, but the number of masks required to prepare the element is large. In addition, since the semiconductor layer is formed after the first electrode layer constituting the Schottky barrier is formed, a metal for forming the first electrode layer is exposed to a high temperature. Furthermore, when the semiconductor layer is formed by plasma CVD, the surface of the first electrode layer is damaged by a plasma. It is therefore difficult to control conditions of annealing performed for accelerating stable interfacial bonding between the surface of the first electrode layer on the semiconductor layer side and the surface of the semiconductor layer on the first electrode layer side. The performance of the resultant active matrix element is unstable and the element has poor reliability. In addition, the semiconductor layer tends to peel from the substrate.